Discover Renesas Electronics' RA family 32-bit microcontrollers (32-bit MCU) featuring advanced Arm Cortex-M cores, offering robust security, outstanding performance, and ultra-low power for IoT and Industry 4.0 solutions. Benefit from the Flexible Software Package (FSP) and a comprehensive partner ecosystem to accelerate your product's market readiness.
Andrew "bunnie" Huang Prepares the "dabao," a Dev Board for Baochip's "Mostly-Open" X1 RISC-V MCU
Built atop Vexriscv and PicoRV32, this 22nm microcontroller is "mostly open" to the RTL level — and a low-cost dev board is on the way.
What’s MXFP4? The 4-Bit Secret Powering OpenAI’s GPT‑OSS Models on Modest Hardware
A Blog post by Rakshit Aralimatti on Hugging Face
Ash Hart on Twitter / X
MCDMA | Metal CUDA Direct Memory Access 🚀If you have a Spark and an Apple Silicon Mac, MCDMA gives you a direct RDMA path between CUDA memory and Metal-side unified memory over USB-C.Registered memory, rkeys, one-sided READ/WRITE, two-sided SEND/RECV with credit flow… pic.twitter.com/gFt8tx9xII— Ash Hart (@ashxhart) August 18, 2026
qualcomm/nexa-sdk
Run frontier LLMs and VLMs with day-0 model support across GPU, NPU, and CPU, with comprehensive runtime coverage for PC (Python/C++), mobile (Android & iOS), and Linux/IoT (Arm64 & x86 Docker). Supporting OpenAI GPT-OSS, IBM Granite-4, Qwen-3-VL, Gemma-3n, Ministral-3, and more.
RISC-V International
RISC-V is an open standard Instruction Set Architecture (ISA) enabling a new era of processor innovation through open collaboration.
The Potential of M6 and M5 Ultra for Local AI on macOS
Earlier today, Apple unveiled the new generation of Mac mini and Mac Studio, featuring the latest entries in the Apple silicon family of chips: the M6, available in the Mac mini, and the M5 Ultra, exclusive to the Mac Studio. You can read more details about the announcement and related specs in John’s overview. As
Release v0.29.0 · ml-explore/mlx
Highlights Support for mxfp4 quantization (Metal, CPU) More performance improvements, bug fixes, features in CUDA backend mx.distributed supports NCCL back-end for CUDA What's Changed [CUDA]...
Orange Pi Zero 3W 6GB LPDDR5 Allwinner A733 Octa Core CPU 3 Tops Single Board Computer, 2.0GHz Frequency WiFi 6 & Bluetooth 5.4 (BLE) Onboard Antenna Support 4K Display Run Android Ubuntu
Category Specification Details SOC：AllWinner A733 CPU：2 x Arm Cortex-A76 (up to 2.0 GHz) 6 x Arm Cortex-A55 GPU：Imagination PowerVR BXM-4-64 MC1Supporting OpenGL ES 3.2, Vulkan 1.3, OpenCL 3.0 NPU：Up to 3 TOPS @INT8, supporting mixed-precision computation with INT8, INT16, FP16, and BF16. Coproc...
Order a Framework Desktop with AMD Ryzen™ AI Max
Framework Desktop: A simple, quiet, mini PC with performance far beyond its size, powered by a highly-integrated processor from AMD.
The Hackintosh Reborn... with AI
Almost a decade ago, I released a hackintosh guide on running macOS 10.14 through a VM with an x86 host. A "Hackintosh" is the feat of running macOS on non-Apple hardware, and has a history dating back to the late 1980s. At the time KVM and PCI
Tock OS A Rust Based Open Platform for Transparent and Secure Root of Trust Devices
BISCUT | AI Chips for Edge
The BISCUT Coldfoot microchip brings AI to the ultra-low-power edge with biological efficiency.
AlexsJones/llmfit
Hundreds of models & providers. One command to find what runs on your hardware.
RA6M3G, Dave2D support
Hello, a few months ago a blog post was released showing off LVGL with Dave2D on the Renesas RA6M3 microcontroller: Riverdi cooperation, Renesas GPU, RT-Thread board certification, and LVGL-Zig experiments | LVGL’s Blog I have heard that LVGL v9 will have more support for GPUs, is Dave2D support (using Renesas’ driver for it) also planned? Right now there is an implementation of course, but it leaves me wondering if the graphical driver could not be used for even more functions.
GMKtec EVO-X2 AI Mini PC AMD Ryzen™ AI Max+ 395
EVO-X2 AMD Ryzen™ Al Max+ 395 Mini PC, the World’s First Windows 11 AI+ PC APU Supporting 70B LLM, Experience relentless power with the AMD Ryzen™ AI Max+ 395. With 16 cores and 32 threads built on the groundbreaking Zen 5 architecture, it clocks up to 5.1GHz. Crafted using TSMC’s advanced 4nm FinFET process and armed with a massive 16MB L2 and 64MB L3 cache, it delivers seamless multitasking and unrivaled parallel processing.
Part 4: Brief history of Apple ML Stack
By Mirai Labs, frontier on-device AI lab. Building the models, inference runtime, and quantization stack from the device constraint up.
